XC164CS-16F Datasheet, PDF(72/78 Page) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core

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XC164CS-16F Datasheet, PDF (72/78 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core

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XC164-16

Derivatives

Electrical Parameters

Variable Memory Cycles

External bus cycles of the XC164 are executed in five subsequent cycle phases (AB, C,

D, E, F). The duration of each cycle phase is programmable (via the TCONCSx

registers) to adapt the external bus cycles to the respective external module (memory,

peripheral, etc.).

This table provides a summary of the phases and the respective choices for their

duration.

Table 21 Programmable Bus Cycle Phases (see timing diagrams)

Bus Cycle Phase

Parameter Valid Values Unit

Address setup phase, the standard duration of this tpAB

phase (1 â¦ 2 TCP) can be extended by 0 â¦ 3 TCP

if the address window is changed

1 â¦ 2 (5) TCP

Command delay phase

Write Data setup/MUX Tristate phase

Access phase

Address/Write Data hold phase

tpC

0â¦3

TCP

tpD

0â¦1

TCP

tpE

1 â¦ 32

TCP

tpF

0â¦3

TCP

Note: The bandwidth of a parameter (minimum and maximum value) covers the whole

operating range (temperature, voltage) as well as process variations. Within a

given device, however, this bandwidth is smaller than the specified range. This is

also due to interdependencies between certain parameters. Some of these

interdependencies are described in additional notes (see standard timing).

Data Sheet

V2.2, 2006-03

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