XC164CS-16F Datasheet, PDF (19/78 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core

XC164-16
Derivatives
Functional Description
3
Functional Description
The architecture of the XC164 combines advantages of RISC, CISC, and DSP
processors with an advanced peripheral subsystem in a very well-balanced way. In
addition, the on-chip memory blocks allow the design of compact systems-on-silicon with
maximum performance (computing, control, communication).
The on-chip memory blocks (program code-memory and SRAM, dual-port RAM, data
SRAM) and the set of generic peripherals are connected to the CPU via separate buses.
Another bus, the LXBus, connects additional on-chip resources as well as external
resources (see Figure 3).
This bus structure enhances the overall system performance by enabling the concurrent
operation of several subsystems of the XC164.
The following block diagram gives an overview of the different on-chip components and
of the advanced, high bandwidth internal bus structure of the XC164.
PSRAM
ProgMem
Flash/ROM
64/128 Kbytes
OCDS
Debug Support
Osc / PLL _{RTC WDT}
Clock Generator
DPRAM
CPU
C166SV2 - Core
DSRAM
EBC
LXBus Control
External Bus
Control
Interrupt & PEC
Interrupt Bus
ADC
8-Bit/
10-Bit
14 Ch
GPT ASC0 ASC1 SSC0 SSC1
T2 ^{USART USART SPI SPI}
T3
T4
CC1
T0
T1
CC2
T7
T8
T5
T6 _{BRGen BRGen BRGen BRGen}
P 20 P 9
56
Port 5 Port 4
14
8
Port 3
14
Figure 3 Block Diagram
CC6
T12
T13
PORT1
16
Twin
CAN
AB
PORT0
16
MCB04323_X416
Data Sheet
17
V2.2, 2006-03