XC164CS-16F Datasheet, PDF (34/78 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core

XC164-16
Derivatives
Functional Description
3.7
The Capture/Compare Unit CAPCOM6
The CAPCOM6 unit supports generation and control of timing sequences on up to three
16-bit capture/compare channels plus one independent 10-bit compare channel.
In compare mode the CAPCOM6 unit provides two output signals per channel which
have inverted polarity and non-overlapping pulse transitions (deadtime control). The
compare channel can generate a single PWM output signal and is further used to
modulate the capture/compare output signals.
In capture mode the contents of compare timer T12 is stored in the capture registers
upon a signal transition at pins CCx.
Compare timers T12 (16-bit) and T13 (10-bit) are free running timers which are clocked
by the prescaled system clock.
Period Register
T12P
Offset Register
T12OF
f_CPU
Compare
Timer T12
16-bit
Control Register
CTCON
Mode
Select Register
CC6MSEL
CC Channel 0
CC60
CC Channel 1
CC61
CC Channel 2
CC62
Trap Register
Port
Control
Logic
CTRAP
CC60
COUT60
CC61
COUT61
CC62
COUT62
COUT63
f_CPU
Compare
Timer T13
10-bit
Period Register
T13P
Compare Register
CMP13
Block
Commutation
Control
CC6MCON.H
CC6POS0
CC6POS1
CC6POS2
The timer registers (T12, T13) are not directly accessible.
The period and offset registers are loading a value into the timer registers.
MCB04109
Figure 6 CAPCOM6 Block Diagram
For motor control applications both subunits may generate versatile multichannel PWM
signals which are basically either controlled by compare timer T12 or by a typical hall
sensor pattern at the interrupt inputs (block commutation).
Data Sheet
32
V2.2, 2006-03