TLE8110EE Datasheet, PDF (66/72 Pages) Infineon Technologies AG – Smart Multichannel Low Side Switch with Parallel Control and SPI Interface

FLEX
Smart Multi-Channel Switch
Control of the device
12.3.3 OUTx - Output Control Register CHx
The Output Control Register OUTx consists of 10 Bits to control the Output Channel. Each Bit switches ON/OFF
the related Channel.
OUTx becomes only active when ISx[1:0] = 0x. For details refer to Chapter 12.3.4.
OUTx
Output Control Register
DATA
Reset Value: 1100 0000 0000_B = C00_h
11
10
9
8
7
6
5
4
3
2
1
0
1
1
OUT10 OUT9 OUT8 OUT7 OUT6 OUT5 OUT4 OUT3] OUT2 OUT1
Field
Bits
OUTx[9:0] 9:0
Type
R/W
OUT[11:10] 11:10
R/W
Description
Data - OUTx[9:0]
OUTx = 0 According Channel is switched OFF
OUTx = 1 According Channel is switched ON
default (all channels OFF) OUT[9:0] = 00 0000 0000_B = 000_h
Data - OUTx[11:10]
bits are set to OUT[11:10] = 1.
12.3.4 ISx - INPUT or Serial Mode Control Register, Bank A and Bank B
The INPUT or Serial Control Register [ ISx[1:0] ] allows to define the way of controlling the Output Channels. There
are 4 setting options possible:
• Standard Serial Control: The related Output Channel is set according the content of the OUTx Register.
(Chapter 12.3.3)
• A further possibility is the control by the Input Pins
• The settings of the Parallel Mode Register PMx[0]. (Chapter 12.3.5)
• Additionally possible is the AND operation between the setting of the OUTx register and the PWM signal at the
INPUT Pin.
ISAx
INPUT or Serial Mode Control Register Bank A
11
10
9
8
7
6
IS6
IS5
IS4
COMMAND
Reset Value: 1010 1010 1010_B = AAA_h
5
4
IS3
3
2
IS2
1
0
IS1
Data Sheet
66
Rev. 1.0, 2009-06-15