TLE8110EE Datasheet, PDF (61/72 Pages) Infineon Technologies AG – Smart Multichannel Low Side Switch with Parallel Control and SPI Interface

FLEX
Smart Multi-Channel Switch
Control of the device
S_SI
SPI_Serial Input
DCC
11 10
9
8
7
6
5
4
3
2
1
0
DRA
0
1
0
1
0
0
0
0
0
0
0
0
DRB
0
1
1
0
0
0
0
0
0
0
0
0
DRACL
0
0
0
1
0
0
0
0
0
0
0
0
DRBCL
0
0
1
0
0
0
0
0
0
0
0
0
DMSCL/OPSx
1
0
0
0
OPSx
DMS1/OPSx
1
0
1
1
OPSx
DMS2/OPSx
1
1
0
1
OPSx
DMS3/OPSx
1
1
1
0
OPSx
DMSx/OPS1
1
DMSx
0
0
0
0
0
0
0
1
DMSx/OPS2
1
DMSx
0
0
0
0
0
0
1
0
DMSx/OPS3
1
DMSx
0
0
0
0
0
1
0
0
DMSx/OPS4
1
DMSx
0
0
0
0
1
0
0
0
DMSx/OPS5
1
DMSx
0
0
0
1
0
0
0
0
DMSx/OPS6
1
DMSx
0
0
1
0
0
0
0
0
DMSx/OPS7
1
DMSx
0
1
0
0
0
0
0
0
DMSx/OPS8
1
DMSx
1
0
0
0
0
0
0
0
Field
Bits
11:0
DCC_DRA
11:0
DCC_DRB
11:0
DCC_
DRACL
DCC_
11:0
DRBCL
DCC_
11:8
DMSCL
Type
W
W
W
W
W
Description
DRA - Diagnosis Register A (see Chapter 12.3.2.1)
Read out Diagnosis Register A. Return the contents in the next SPI
Frame. (see Chapter 12.3.2.2)
DRB - Diagnosis Register B (see Chapter 12.3.2.1)
Read out Diagnosis Register B. Return the contents in the next SPI
Frame. (see Chapter 12.3.2.2)
DRACL - Diagnosis Register A Clear
Clear the contents of the Diagnosis Register A. Return the cleared
contents in the next SPI Frame. If the Diagnosis Error Remains,
the Information remains.(see Chapter 12.3.2.2)
DRBCL - Diagnosis Register B Clear
Clear the contents of the Diagnosis Register B. Return the cleared
contents in the next SPI Frame. If the Diagnosis Error Remains,
the Information remains. (see Chapter 12.3.2.2)
DMSCL/OPSx - Diagnosis Mode Set, Clear / Output Pins Set
On sending this command, the diagnosis registers DRA, DRB as well
as the “virtual” Diagnosis Output Registers DO[7:0] (see
Chapter 12.3.2.3) are cleared. Output Pin Settings are done
according the content of OPSx.
Returns the contents of cleared DR2 on SO in the 2nd byte of the
actual communication frame and the Output Pin Feedback in
the 1st Byte of the next frame. (see Chapter 12.3.2.3)
Data Sheet
61
Rev. 1.0, 2009-06-15