C165UTAH Datasheet, PDF (53/539 Pages) Infineon Technologies AG – EMBEDDED C166 WITH USART IOM-2 AND HDLC SUPPORT

C165UTAH
Memory Organization
In order to minimize the use of the EXTR instructions the ESFR area mostly holds
registers which are mainly required for initialization and mode selection. Registers that
need to be accessed frequently are allocated to the standard SFR area, wherever
possible.
Note: The tools are equipped to monitor accesses to the ESFR area and will
automatically insert EXTR instructions, or issue a warning in case of missing or
excessive EXTR instructions.
4.2
External Memory Space
The C165UTAH is capable of using an address space of up to 8 MByte. Only parts of
this address space are occupied by internal memory areas. All addresses which are not
used for on-chip memory (RAM) or for registers may reference external memory
locations. This external memory is accessed via the C165UTAH’s external bus interface.
Four memory bank sizes are supported:
• Non-segmented mode: 64 KByte with A15...A0 on PORT0 or PORT1
• 2-bit segmented mode: 256 KByte with A17...A16 on Port 4 and
A15...A0 on PORT0 or PORT1
• 4-bit segmented mode: 1 MByte with A19...A16 on Port 4 and
A15...A0 on PORT0 or PORT1
• 8-bit segmented mode: 8 MByte with A22...A16 on Port 4 and A15...A0 on PORT0 or
PORT1
Each bank can be directly addressed via the address bus, while the programmable chip
select signals can be used to select various memory banks.
The C165UTAH also supports four different bus types:
• Multiplexed 16-bit Buswith address and data on PORT0 (Default after Reset)
• Multiplexed 8-bit Buswith address and data on PORT0/P0L
• Demultiplexed 16-bit Buswith address on PORT1 and data on PORT0
• Demultiplexed 8-bit Buswith address on PORT1 and data on P0L
Memory model and bus mode are selected during reset by pin EA and PORT0 pins. For
further details about the external bus configuration and control please refer to chapter
"The External Bus Interface".
External word and byte data can only be accessed via indirect or long 16-bit addressing
modes using one of the four DPP registers. There is no short addressing mode for
external operands. Any word data access is made to an even byte address.
For PEC data transfers the external memory can be accessed independent of the
contents of the DPP registers via the PEC source and destination pointers.
Data Sheet
53
2001-02-23