C165UTAH Datasheet, PDF (124/539 Pages) Infineon Technologies AG – EMBEDDED C166 WITH USART IOM-2 AND HDLC SUPPORT

C165UTAH
Interrupt and Trap Functions
7.8
External Interrupts
Although the C165UTAH has no dedicated INTR input pins, it provides many possibilities
to react on external asynchronous events by using a number of I/O lines for interrupt
input. The interrupt function may either be combined with the pin’s main function or may
be used instead of it, ie. if the main pin function is not required.
Interrupt signals may be connected to:
• EX7IN...EX0IN, the fast external interrupt input pins,
• T4IN, T2IN, the timer input pins,
For each of these pins either a positive, a negative, or both a positive and a negative
external transition can be selected to cause an interrupt or PEC service request. The
edge selection is performed in the control register of the peripheral device associated
with the respective port pin. The peripheral must be programmed to a specific operating
mode to allow generation of an interrupt by the external signal. The priority of the
interrupt request is determined by the interrupt control register of the respective
peripheral interrupt source, and the interrupt vector of this source will be used to service
the external interrupt request.
Note: In order to use any of the listed pins as external interrupt input, it must be switched
to input mode via its direction control bit DPx.y in the respective port direction
control register DPx.
Table 27 Pins to be used as External Interrupt Inputs
Port Pin
P2.7-0/EX7-0IN
P3.7/T2IN
P3.5/T4IN
Original Function
Fast external interrupt input pin
Auxiliary timer T2 input pin
Auxiliary timer T4 input pin
Control Register
EXICON
T2CON
T4CON
Pins T2IN or T4IN can be used as external interrupt input pins when the associated
auxiliary timer T2 or T4 in block GPT1 is configured for capture mode. This mode is
selected by programming the mode control fields T2M or T4M in control registers
T2CON or T4CON to 101_B. The active edge of the external input signal is determined by
bit fields T2I or T4I. When these fields are programmed to X01_B, interrupt request flags
T2IR or T4IR in registers T2IC or T4IC will be set on a positive external transition at pins
T2IN or T4IN, respectively. When T2I or T4I are programmed to X10_B, then a negative
external transition will set the corresponding request flag. When T2I or T4I are
programmed to X11_B, both a positive and a negative transition will set the request flag.
In all three cases, the contents of the core timer T3 will be captured into the auxiliary
timer registers T2 or T4 based on the transition at pins T2IN or T4IN. When the interrupt
Data Sheet
124
2001-02-23