C165UTAH Datasheet, PDF (233/539 Pages) Infineon Technologies AG – EMBEDDED C166 WITH USART IOM-2 AND HDLC SUPPORT

C165UTAH
General Purpose Timer Unit
f_{hw_clk}
Txl
2ⁿ : 1
TxR
Core Timer Tx
Up/
Down
Interrupt
Request
TxOTL
Figure 73
TxUD
TxUDE
x=6
Block Diagram of Core Timer T6 in Timer Mode
MCB02028
11.1.2.2 Auxiliary Timer T5
The auxiliary timer T5 can be configured for timer mode with the same options for the
timer frequencies and the count signal as the core timer T6. In addition, the auxiliary
timer can be concatenated with the core timer.
The individual configuration for timer T5 is determined by its bitaddressable control
register T5CON. Note that functions which are present in both timers of timer block 2 are
controlled in the same bit positions and in the same manner in each of the specific control
registers.
Run control for auxiliary timer T5 can be handled by the associated Run Control Bit T5R
in register T5CON. Alternatively, a remote control option (T5RC = ’1’) may be enabled
to start and stop T5 via the run bit T6R of core timer T6.
Note: The auxiliary timer has no overflow/underflow toggle latch. Therefore, an output
line for Overflow/Underflow Monitoring is not provided.
Count Direction Control for Auxiliary Timer
The count direction of the auxiliary timer can be controlled in the same way as for the
core timer T6. The description and the table apply accordingly.
Timer T5 in Counter Mode
Counter mode for the auxiliary timer T5 is selected by setting bit field T5M in register
T5CON to ‘001_B’. In counter mode, timer T5 can be clocked by a transition of timer T6’s
output signal T6OFL only.
Data Sheet
233
2001-02-23