C165UTAH Datasheet, PDF (168/539 Pages) Infineon Technologies AG – EMBEDDED C166 WITH USART IOM-2 AND HDLC SUPPORT

C165UTAH
Parallel Ports
P6PHEN (FE94_H / 4A_H)
15 14 13 12 11 10 9
-
-
-
-
-
-
-
SFR
Reset Value: - - 00_H
876543210
P6 P6 P6 P6 P6 P6 P6 P6
PHEN PHEN PHEN PHEN PHEN PHEN PHEN PHEN
.7 .6 .5 .4 .3 .2 .1 .0
- rw rw rw rw rw rw rw rw
Bit
P6PHEN.y
Function
Output Driver Enable in Power Down Mode
P6PHEN.y = 0: output driver is disabled in power down mode
P6PHEN.y = 1: output driver is enabled in power down mode
8.6.1 Alternate Functions of PORT6
A programmable number of chip select signals (CS4...CS0) derived from the bus control
registers (BUSCON4...BUSCON0) can be output on 5 pins of Port 6. The other 3 pins
may be used for bus arbitration to accomodate additional masters in a C165UTAH
system.
The number of chip select signals is selected via PORT0 during reset. The selected
value can be read from bitfield CSSEL in register RP0H (read only) eg. in order to check
the configuration during run time.
Table 32 summarizes the alternate functions of Port 6 depending on the number of
selected chip select lines (coded via bitfield CSSEL).
Table 32
Alternate Functions of Port 6
Port 6 Pin
P6.0
P6.1
P6.2
P6.3
P6.4
P6.5
P6.6
P6.7
Altern. Function Altern. Function
CSSEL = 10
CSSEL = 01
Gen. purpose I/O
Gen. purpose I/O
Gen. purpose I/O
Gen. purpose I/O
Gen. purpose I/O
Chip select CS0
Chip select CS1
Gen. purpose I/O
Gen. purpose I/O
Gen. purpose I/O
HOLD
HLDA
BREQ
External hold request input
Hold acknowledge output
Bus request output
Altern. Function
CSSEL = 00
Chip select CS0
Chip select CS1
Chip select CS2
Gen. purpose I/O
Gen. purpose I/O
Altern. Function
CSSEL = 11
Chip select CS0
Chip select CS1
Chip select CS2
Chip select CS3
Chip select CS4
Data Sheet
168
2001-02-23