C165UTAH Datasheet, PDF (241/539 Pages) Infineon Technologies AG – EMBEDDED C166 WITH USART IOM-2 AND HDLC SUPPORT

Field
T2I
T2M
T2R
T2UD
T2UDE
T2RC
0
T2EDGE
C165UTAH
General Purpose Timer Unit
Bits Type
[2:0] rw
[5:3] rw
6
rw
7
rw
8
rw
9
rw
[11:10] r
12
rw
Value
000
001
010
011
100
101
110
111
0
1
0
1
0
1
0
1
0
1
Description
Timer 2 Input Parameter Selection
Timer mode see Table 49 for encoding
Gated Timer see Table 49 for encoding
Counter mode see Table 50 for encoding
Incremental Interface mode see Table 51 for
encoding
Timer 2 Mode Control (Basic Operating Mode)
Timer Mode
Counter Mode
Gated Timer with Gate active low
Gated Timer with Gate active high
Reload Mode
Capture Mode
Incremental Interface Mode ( Rotation detection)
Incermental Interface Mode ( Edge detection )
Timer 2 Run Bit
Timer / Counter 2 stops
Timer / Counter 2 runs
Timer 2 Up / Down Control
(when T2UDE = ’0)
Counting ’Up’
Counting ’Down’
Timer 2 External Up/Down Enable
Counting direction is internally controlled by SW
Counting direction is externally controlled by line
T2EUD.
Note: Pin P3.5 connected to T2EUD is also
connected to T4IN and to T3EUD.
Timer 2 Remote Control
Timer / Counter 2 is controlled by
its own run bit T2R
Timer / Counter 2 is controlled by
the run bit of core timer 3
reserved for future use; reading returns 0;
writing to these bit positions has no effect.
Timer 2 Edge Detection
The bit is set on each successful edge detection.
The bit has to be reset by SW.
No count edge was detected
A count edge was detected
Data Sheet
241
2001-02-23