TC1736 Datasheet, PDF (28/123 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1736
The following figure shows the block diagram of the PMU0:
PMU0
To/From
Local Memory Bus
64
LMB Interface
Slave
Overlay RAM
Interface
PMU
Control
64
OVRAM
64
Flash Interface Module
64
64
Emulation
Memory
Interface
DFLASH
PFLASH
Introduction
64
ROM Control
64
BROM
Figure 2-3
Emulation Memory
(ED chip only )
PMU0 Basic Block Diagram
P MU0_B as i c B l oc k Di ag_generi c
2.4.6.1 Boot ROM
The internal 16 Kbyte Boot ROM (BROM) is divided into two parts, used for:
• firmware (Boot ROM), and
• factory test routines (Test ROM).
The different sections of the firmware in Boot ROM provide startup and boot operations
after reset. The TestROM is reserved for special routines, which are used for testing,
stressing and qualification of the component.
2.4.6.2 Overlay RAM and Data Acquisition
The overlay memory OVRAM is provided in the PMU especially for redirection of data
accesses to program memory to the OVRAM by using the data overlay function. The
data overlay functionality itself is controlled in the DMI module.
Data Sheet
Intro, V1.1
24
V1.1, 2009-08