TC1736 Datasheet, PDF (18/123 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1736
2.2.1 Block Diagram
Figure 2-1 shows the block diagram of the TC1736.
Introduction
PMI
8 KB SPRAM/
ICACHE
(configurable )
FPU
TriCore^TM
CPU
CPS
LBCU
Local Memory Bus (LMB)
DMI
Up to 36 KB LDRAM
G P TA
G P TA 0
PMU
Up to 1 MB PFLASH
32 KB DFLASH
16 KB BROM
4 KB OVRAM
SSC0
LFI Bridge
Ports
DMA
8 Channel
STM
A bbrev i ati ons:
ICACHE: Instruction Cache
SPRAM:
Scratch-Pad RAM
LDRAM:
Local Data RAM
OVRAM: Overlay RAM
B RO M:
Boot ROM
PFlash:
Program Flash
DFlash:
Data Flash
O CDS
ASC0
ASC1
SSC1
SBCU
System Peripheral Bus(SPB)
SCU
PLL
MLI0
MultiCAN
(2 Nodes)
MSC0
ADC0
(3.3-5V)
ADC1
(3.3-5V)
FADC
(3.3V)
16
4
4
Analog Inputs
Figure 2-1 TC1736 Block Diagram
TC 1736_BlockDiag
Data Sheet
Intro, V1.1
14
V1.1, 2009-08