TC1736 Datasheet, PDF (106/123 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1736
Electrical Parameters
2) t_OSCS is defined from the moment when V_DDOSC3 = 3.13 V until the oscillations reach an amplitude at XTAL1 of
0,3 × V_DDOSC3. This parameter is verified by device characterization. The external oscillator circuitry must be
optimized by the customer and checked for negative resistance as recommended and specified by crystal
suppliers.
3) Any ESR0 activation is internally prolonged to SCU_RSTCNTCON.RELSA FPI bus clock (f_FPI) cycles.
4) Applicable for input pins TESTMODE and TRST pins.
5) f_FPI = f_CPU / 2
6) Not subject to production test, verified by design / characterization.
7) This parameter includes the delay of the analog spike filter in the PORST pad.
8) The duration of the boot-time is defined between the rising edge of the PORST and the moment when the first
user instruction has entered the CPU and its processing starts.
9) The duration of the boot time is defined between the following events:
1. Hardware reset: the falling edge of a short ESR0 pulse and the moment when the first user instruction has
entered the CPU and its processing starts, if the ESR0 pulse is shorter than
SCU_RSTCNTCON.RELSA × T_FPI.
If the ESR0 pulse is longer than SCU_RSTCNTCON.RELSA × T_FPI, only the time beyond it should be added
to the boot time (ESR0 falling edge to first user instruction).
2. Software reset: the moment of starting the software reset and the moment when the first user instruction
has entered the CPU and its processing starts
VDD PPA
VDDP
VDDP -12%
VD DPPA
VDD
PORST
TRST
TESTMODE
ESR0
HWCFG
Pads
t_POA
t_POA
t_POH
t_POH
t _hd
t_HDH
t _hd
t_HDH
t _PIP
t_PI
t_PI
t _PIP
Pad-state undefined
Tri-state or pull device active
As programmed
t _PIP
t_PI
Figure 9 Power, Pad and Reset Timing
VDD -12%
t_HDH
t_PI
t_PI
reset_beh2
Data Sheet
102
V1.1, 2009-08