TC1736 Datasheet, PDF (20/123 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

2.3
High-Performance 32-Bit TriCore CPU
TC1736
Introduction
TriCore (TC1.3.1) Architectural Highlights
• Unified RISC MCU/DSP
• 32-bit architecture with 4 Gbytes unified data, program, and input/output address
space
• Fast automatic context-switching
• Multiply-accumulate unit
• Floating point unit
• Saturating integer arithmetic
• High-performance on-chip peripheral bus (FPI Bus)
• Register based design with multiple variable register banks
• Bit handling
• Packed data operations
• Zero overhead loop
• Precise exceptions
• Flexible power management
High-Efficiency TriCore Instruction Set
• 16/32-bit instructions for reduced code size
• Data types include: Boolean, array of bits, character, signed and unsigned integer,
integer with saturation, signed fraction, double-word integers, and IEEE-754 single-
precision floating point
• Data formats include: Bit, 8-bit byte, 16-bit half-word, 32-bit word, and 64-bit double-
word data formats
• Powerful instruction set
• Flexible and efficient addressing mode for high code density
Integrated CPU related On-Chip Memories
• 8 KB instruction memory
– configurable as SPRAM and ICACHE in 4 KB granularity
• Up to 36 KB data memory (LDRAM)
• On-chip SRAMs with parity error detection
Data Sheet
Intro, V1.1
16
V1.1, 2009-08