 English |
|
|
|
|
|
|
|
| HYB25D128400AT Datasheet, PDF (23/79 Pages) Infineon Technologies AG – 128 Mbit Double Data Rate SDRAM | |||
| |||
| ◁ |
CK
CK
Command
Address
DQS
DQ
HYB25D128[400/800/160]A-[6/7/8]
128Mbit Double Data Rate SDRAM
Functional Description
CAS Latency = 2
Read
BA a,COL n
NOP
CL=2
NOP
NOP
DOa-n
NOP
NOP
CK
CK
Command
Address
DQS
DQ
CAS Latency = 2.5
Read
BA a,COL n
NOP
NOP
NOP
CL=2.5
DOa-n
NOP
NOP
DO a-n = data out from bank a, column n.
3 subsequent elements of data out appear in the programmed order following DO a-n.
Shown with nominal tAC, tDQSCK, and tDQSQ.
Figure 9 Read Burst: CAS Latencies (Burst Length = 4)
Donât Care
Data Sheet
23
Rev. 1.06, 2004-01
09192003-LFQ1-R60G
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese