HYB18L128160BF Datasheet, PDF (21/53 Pages) Infineon Technologies AG – DRAMs for Mobile Applications

HY[B/E]18L128160B[C/F]-7.5
128-Mbit Mobile-RAM
Functional Description
Table 9 Timing Parameters for ACTIVE Command
Parameter
Symbol
- 7.5
Units
min.
max.
ACTIVE to ACTIVE command period
ACTIVE to READ or WRITE delay
ACTIVE bank A to ACTIVE bank B delay
t_RC
67
t_RCD
19
t_RRD
15
–
ns
–
ns
–
ns
1) These parameters account for the number of clock cycles and depend on the operating frequency as follows:
no. of clock cycles = specified delay / clock period; round up to next integer.
Notes
1)
1)
1)
2.4.5 READ
CLK
CKE
CS
RAS
CAS
WE
A0-A8
A10
BA0,BA1
(High)
CA
Enable AP
AP
Disable AP
BA
= Don't Care
BA = Bank Address
CA = Column Address
AP = Auto Precharge
Figure 11 READ Command
Subsequent to programming the mode register with CAS latency and burst length, READ bursts are initiated with
a READ command, as shown in Figure 11. Basic timings for the DQs are shown in Figure 12; they apply to all
read operations and therefore are omitted from all subsequent timing diagrams.
The starting column and bank addresses are provided with the READ command and Auto Precharge is either
enabled or disabled for that burst access. If Auto Precharge is enabled, the row being accessed starts precharge
at the completion of the burst, provided t_RAS has been satisfied. For the generic READ commands used in the
following illustrations, Auto Precharge is disabled.
Data Sheet
21
V1.4, 2004-04-30