HYB18L128160BF Datasheet, PDF (20/53 Pages) Infineon Technologies AG – DRAMs for Mobile Applications

2.4.4 ACTIVE
HY[B/E]18L128160B[C/F]-7.5
128-Mbit Mobile-RAM
Functional Description
CLK
CKE
CS
RAS
CAS
WE
A0-A11
BA0,BA1
(High)
RA
BA
= Don't Care
BA = Bank Address
RA = Row Address
Figure 9 ACTIVE Command
Before any READ or WRITE commands can be issued to a bank within the Mobile-RAM, a row in that bank must
be “opened” (activated). This is accomplished via the ACTIVE command and addresses A0 - A11, BA0 and BA1
(see Figure 9), which decode and select both the bank and the row to be activated. After opening a row (issuing
an ACTIVE command), a READ or WRITE command may be issued to that row, subject to the t_RCD specification.
A subsequent ACTIVE command to a different row in the same bank can only be issued after the previous active
row has been “closed” (precharged).
The minimum time interval between successive ACTIVE commands to the same bank is defined by t_RC. A
subsequent ACTIVE command to another bank can be issued while the first bank is being accessed, which results
in a reduction of total row-access overhead. The minimum time interval between successive ACTIVE commands
to different banks is defined by t_RRD.
CLK
Command ACT
A0-A11 ROW
BA0, BA1 BA x
NOP
t_RRD
Figure 10 Bank Activate Timings
ACT
ROW
BA y
NOP
NOP
t_RCD
RD/WR
COL
BA y
NOP
= Don't Care
Data Sheet
20
V1.4, 2004-04-30