HYB18L128160BF Datasheet, PDF(11/53 Page) Infineon Technologies AG

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HYB18L128160BF Datasheet, PDF (11/53 Pages) Infineon Technologies AG – DRAMs for Mobile Applications

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HY[B/E]18L128160B[C/F]-7.5

128-Mbit Mobile-RAM

Functional Description

The 128-Mbit Mobile-RAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits.

It is internally configured as a quad-bank DRAM.

READ and WRITE accesses to the Mobile-RAM are burst oriented; accesses start at a selected location and

continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration

of an ACTIVE command, followed by a READ or WRITE command. The address bits registered coincident with

the ACTIVE command are used to select the bank and row to be accessed (BA0, BA1 select the banks, A0 - A11

select the row). The address bits registered coincident with the READ or WRITE command are used to select the

starting column location for the burst access.

Prior to normal operation, the Mobile-RAM must be initialized. The following sections provide detailed information

covering device initialization, register definition, command description and device operation.

2.1

Power On and Initialization

The Mobile-RAM must be powered up and initialized in a predefined manner (see Figure 3). Operational

procedures other than those specified may result in undefined operation.

VDD

VDDQ

CLK

CKE

200Âµs

tCK

tRP

tRFC

tMRD

Command

Address

A10

BA0,BA1

DQM

(H Level)

(High-Z)

NOP

PRE

ARF

All

Banks

ARF

MRS

CODE

MRS

CODE

NAOCTP

NROAP

BA0=L

BA1=L

BA0=L

BA1=H

NBOAP

Power-up:

VDD and CK stable

Figure 3 Power-Up Sequence and Mode Register Sets

Load

Mode

Load

Ext.

Mode

= Don't Care

Data Sheet

V1.4, 2004-04-30

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