STAC9766 Datasheet, PDF (72/97 Pages) Integrated Device Technology – TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING

STAC9766/9767
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING
PC AUDIO
Note: This register does not reset on RESET#.
Function Code
00h
01h
05h
06h
I/O
Line_Out
Headphone_Out
Mic1
Mic2
Sense Capability
Jack Sense
Jack Sense
Mic Sense
Mic Sense
Table 23. Supported Jack and Mic Sense Functions
8.4.5. Function Information (68h Page 01h)
Register 24h must be set to Page 01h to access this register.
Default: 00xxh, see table 24: page73.
D15
D14
D13
D12
D11
D10
D9
D8
G4
G3
G2
G1
G0
INV
DL4
DL3
D7
D6
D5
D4
D3
D2
D1
D0
DL2
DL1
DL0
IV
RESERVED
FIP
Bit(s) Reset Value
15
0
14-11
0
10
Name
G4
G3:G0
INV
Description
Gain Sign Bit: The CODEC updates this bit with the sign of the gain value
present in G[3:0]. The BIOS updates this to take into consideration external
amplifiers or other external logic when relevant.
G[4] indicates whether the value is a gain or attenuation.
Gain in the G4 bit is in terms of dB.
This bit is Read/Write and only reset on POR and not by RESET#.
Gain Bits: The CODEC updates these bits with the gain value (dB relative to
level-out) in 1.5dBV increments. The BIOS updates these to take into
consideration external amplifiers or other external logic when relevant.
G[0:3] indicates the magnitude of the gain. G[4] indicates whether the value is a
gain or attenuation.
For Gain/Attenuation settings, see Table 25: page74.
These bits are read/write and are not reset on RESET#.
Inversion bit: Indicates that the CODEC presents a 180 degree phase shift to the
signal.
0h - No inversion reported
1h - Inverted
This bit is read/write and is not reset on RESET#.
BIOS should invert for each inverting gain stage.
IDT™
72
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING
STAC9766/9767
V 7.4 12/06