ICS9FG1201H_11 Datasheet, PDF (7/23 Pages) Integrated Device Technology – Frequency Gearing Clock for CPU, PCIe Gen1, Gen2, & FBD

ICS9FG1201H
Frequency Gearing Clock for CPU, PCIe Gen1, Gen2, & FBD
9FG1201/2 SMBus Address Mapping
when using CK410B+ and DB400/800
SMB_A(2:0) = 000
SMB Adr: D0
9FG1201/2
(DB1200G)
SMB_A(2:0) = 001
SMB Adr: D2
OR
9FG1201/2
(DB1200G)
SMB Adr: D2
932S421
(CK410B+)
SMB_A(2:0) = 010
SMB Adr: D4
9FG1201/2
(DB1200G)
SMB_A(2:0) = 011
SMB Adr: D6
` 9FG1201/2
(DB1200G)
SMB_A(2:0) = 100
SMB Adr: D8
9FG1201/2
(DB1200G)
SMB_A(2:0) = 101
SMB Adr: DA
9FG1201/2
(DB1200G)
SMB_A(2:0) = 110
SMB Adr: DC
OR
9FG1201/2
(DB1200G)
SMB Adr: DC
9DB401/801
(DB400/800)
SMB_A(2:0) = 111
SMB Adr: DE
9FG1201/2
(DB1200G)
IDT^TM/ICS^TM Frequency Gearing Clock for CPU, PCIe Gen1, Gen2, & FBD
7
1371F — 09/23/09