DT72T1845 Datasheet, PDF (49/56 Pages) Integrated Device Technology – 2.5 VOLT HIGH-SPEED TeraSync™ FIFO

IDT72T1845/55/65/75/85/95/105/115/125 2.5V TeraSync™ 18-BIT/9-BIT FIFO 2Kx18/4Kx9, 4Kx18/
8Kx9, 8Kx18/16Kx9, 16Kx18/32Kx9, 32Kx18/64Kx9, 64Kx18/128Kx9, 128Kx18/256Kx9, 256Kx18/512Kx9, 512Kx18/1Mx9
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
WCLK
WEN
D0 - Dn
RCLK
ERCLK
tENS
tENH
tDS tDH
Wn+1
tDS tDH
Wn+2
tDS tDH
Wn+3
tSKEW1
1
2
a
b
c
d
e
f
g
h
i
tERCLK
REN
tENS
tENH
RCS
EREN
Qn
HIGH-Z
OR
O/P
Reg.
Wn Last Word
tCLKEN
tCLKEN
tENS
tCLKEN
tCLKEN
tREF
tA
Wn+1
tRCSLZ
tA
tA
Wn+1
Wn+2
tA
tA
Wn+2
Wn+3
tREF
Wn+3
5909 drw33
NOTE:
1. The O/P Register is the internal output register. Its contents are available on the Qn output bus only when RCS and OE are both active, LOW, that is the bus is not in High-
Impedance state.
2. OE is LOW.
Cycle:
a&b. At this point the FIFO is empty, OR is HIGH.
RCS and REN are both disabled, the output bus is High-Impedance.
c. Word Wn+1 falls through to the output register, OR goes active, LOW.
RCS is HIGH, therefore the Qn outputs are High-Impedance. EREN goes LOW to indicate that a new word has been placed on the output register.
d . EREN goes HIGH, no new word has been placed on the output register on this cycle.
e. No Operation.
f. RCS is LOW on this cycle, therefore the Qn outputs go to Low-Impedance and the contents of the output register (Wn+1) are made available.
NOTE: In FWFT mode is important to take RCS active LOW at least one cycle ahead of REN, this ensures the word (Wn+1) currently in the output register is made
available for at least one cycle.
g . REN goes active LOW, this reads out the second word, Wn+2.
EREN goes active LOW to indicate a new word has been placed into the output register.
h . Word Wn+3 is read out, EREN remains active, LOW indicating a new word has been read out.
NOTE: Wn+3 is the last word in the FIFO.
i . This is the next enabled read after the last word, Wn+3 has been read out. OR flag goes HIGH and EREN goes HIGH to indicate that there is no new word available.
Figure 29. Echo RCLK and Echo REN Operation (FWFT Mode Only)
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