English
Language : 

STAC9750 Datasheet, PDF (28/73 Pages) Integrated Device Technology – VALUE-LINE TWO-CHANNEL AC’97 CODECS
STAC9750/9751
VALUE-LINE TWO-CHANNEL AC’97 CODECS
PC AUDIO
5.1.2.6. Slot 6: PCM Left Record Channel
Audio input frame slot 6 is the left channel output of STAC9750/9751 input MUX, post-ADC.
STAC9750/9751 ADCs are implemented to support 18-bit resolution.
STAC9750/9751 outputs its ADC data (MSB first), and stuffs any trailing non-valid bit positions with 0
to fill out its 20-bit time slot.
See section 6.5.25; page 51 for slot configurations and register settings.
5.1.2.7. Slot 7: PCM Left Record Channel
Audio input frame slot 7 is the left channel output of STAC9750/9751 input MUX, post-ADC.
STAC9750/9751 ADCs are implemented to support 18-bit resolution.
STAC9750/9751 outputs its ADC data (MSB first), and stuffs any trailing non-valid bit positions with 0
to fill out its 20-bit time slot.
See section 6.5.25; page 51 for slot configurations and register settings.
5.1.2.8. Slot 8: PCM Right Record Channel
Audio input frame slot 8 is the right channel output of STAC9750/9751 input MUX, post-ADC.
STAC9750/9751 ADCs are implemented to support 18-bit resolution.
STAC9750/9751 outputs its ADC data (MSB first), and stuffs any trailing non-valid bit positions with
0's to fill out its 20-bit time slot.
See section 6.5.25; page 51 for slot configurations and register settings.
5.1.2.9. Slot 9: PCM Right Record Channel
Audio input frame slot 9 is the right channel output of STAC9750/9751 input MUX, post-ADC.
STAC9750/9751 ADCs are implemented to support 18-bit resolution.
STAC9750/9751 outputs its ADC data (MSB first), and stuffs any trailing non-valid bit positions with 0
to fill out its 20-bit time slot.
See section 6.5.25; page 51 for slot configurations and register settings.
5.1.2.10. Slot 10: PCM Left Record Channel
Audio input frame slot 10 is the left channel output of STAC9750/9751 input MUX, post-ADC.
IDT™
VALUE-LINE TWO-CHANNEL AC’97 CODECS
28
STAC9750/9751
V 5.8 103106