STAC9750 Datasheet, PDF (25/73 Pages) Integrated Device Technology – VALUE-LINE TWO-CHANNEL AC’97 CODECS

STAC9750/9751
VALUE-LINE TWO-CHANNEL AC’97 CODECS
PC AUDIO
5.1.2.
5.1.1.8. Slot 8: PCM Right Surround Channel
Audio output frame slot 8 is the composite digital audio right surround stream. As a programming
option, PCM data from slots 7 and 8 may be used to supply data to the primary DACs. Please refer
to the register programming section for details on the multi-channel programming options.
5.1.1.9. Slot 9: PCM Low Frequency Channel
Audio output frame slot 9 is the composite digital audio low frequency stream used in a multi-channel
application where the STAC9750/9751 is programmed to accept the primary DAC PCM data from
slots 6 and 9. Please refer to the register programming section for details on the multi-channel pro-
gramming options.
5.1.1.10. Slot 10: PCM Alternate Left
Audio output frame slot 10 is the composite digital audio alternate left stream used in a multi-channel
applications. Please refer to the register programming section for details on the multi channel pro-
gramming options.
5.1.1.11. Slot 11: PCM Alternate Right
Audio output frame slot 11 is the composite digital audio alternate right stream used in a multi-chan-
nel applications. Please refer to the register programming section for details on the multi channel
programming options.
5.1.1.12. Slot 12: Reserved
Audio output frame slot 12 is Reserved for modem operations and is not used by the STAC9750/
9751.
AC-Link Audio Input Frame (SDATA_IN)
The audio input frame data streams correspond to the multiplexed bundles of all digital input data
targeting the AC'97 controller. As is the case for audio output frame, each AC-Link audio input frame
consists of twelve 20-bit time slots. Slot 0 is a special Reserved time slot containing 16 bits that are
used for AC-Link protocol infrastructure.
Within slot 0, the first bit is a global bit (SDATA_IN slot 0, bit 15) which flags whether the STAC9750/
9751 is in the “CODEC Ready” state or not. If the “CODEC Ready” bit is a 0, this indicates that
STAC9750/9751 is not ready for normal operation. This condition is normal following the de-asser-
tion of power on reset, for example, while STAC9750/9751’s voltage references settle. When the
AC-Link “CODEC Ready” indicator bit is a 1, it indicates that the AC-Link and STAC9750/9751 con-
trol/status registers are in a fully operational state. The AC'97 controller must further probe the Pow-
erdown Control Status Register (refer to Mixer Register section) to determine exactly which
subsections, if any, are ready.
IDT™
VALUE-LINE TWO-CHANNEL AC’97 CODECS
25
STAC9750/9751
V 5.8 103106