STAC9750 Datasheet, PDF (15/73 Pages) Integrated Device Technology – VALUE-LINE TWO-CHANNEL AC’97 CODECS

STAC9750/9751
VALUE-LINE TWO-CHANNEL AC’97 CODECS
PC AUDIO
2.2. AC Timing Characteristics
(T_ambient = 25 °C, AVdd = 3.3 V or 5 V ± 5%, DVdd = 3.3 V ± 5%, AVss = DVss = 0 V; 50 pF external
load)
2.2.1.
Cold Reset
Figure 2. Cold Reset Timing
Trst2clk
Tres_low
RESET#
BIT_CLK
SDATA_IN
Table 2. Cold Reset Specifications
Parameter
RESET# active low pulse width
RESET# inactive to BIT_CLK startup delay
Symbol Min Typ Max Units
Tres_low 1.0
-
-
µs
Trst2clk 162.8 -
-
ns
Note: BIT_CLK and SDATAIN are in a high impedance state during reset.
2.2.2.
Warm Reset
Figure 3. Warm Reset Timing
Tsync_high
Tsync_2clk
SYNC
BIT_CLK
Table 3. Warm Reset Specifications
Parameter
SYNC active high pulse width
SYNC inactive to BIT_CLK startup delay
Symbol Min Typ Max Units
Tsync_high 1.0 1.3
-
µs
Tsync2clk 162.8 -
-
ns
IDT™
VALUE-LINE TWO-CHANNEL AC’97 CODECS
15
STAC9750/9751
V 5.8 103106