89HPEB383 Datasheet, PDF (198/264 Pages) Integrated Device Technology – Topics discussed include the following

184
14. Register Descriptions > Downstream Non-transparent Address Remapping Registers
14.7
14.7.1
Downstream Non-transparent Address Remapping
Registers
Secondary Bus Non-prefetchable Address Remap Control Register
Register name: AR_SBNPCTRL
Reset value: 0x0000_0000
Register offset: 0x0E4
Bits
7
6
5
31:24
23:16
15:08
07:00
SEC_NP_LBASE
Reserved
Reserved
4
3
2
1
0
SEC_NP_LBASE
NP_REMA
PP_EN
Reserved
IO_SIZE
Reserved
Bits
31:20
19:13
12:8
7:4
3
2:0
Name
Description
SEC_NP_LBASE Secondary non-prefetchable lower base.
Reserved
IO_SIZE
Reserved.
This field describes how many upper bits of a downstream
I/O address are discarded.
Reserved
NP_REMAPP_EN
Reserved
Reserved.
1 = Enable non-prefetchable address remapping
Reserved.
Type
R/W
R
R/W
R
R/W
R
Reset value
0x000
0x00
0x00
0x0
0x0
0x0
PEB383 User Manual
July 25, 2011
Integrated Device Technology, Inc.
Confidential - NDA Required