89HPEB383 Datasheet, PDF (180/264 Pages) Integrated Device Technology – Topics discussed include the following

166
14. Register Descriptions > PCI Capability Registers
14.5.6
EEPROM Control Register
Register name: EE_CTRL
Reset value: Undefined
Register offset: 0x0AC
Bits
31:24
23:16
15:08
07:00
7
6
Reserved
5
4
3
2
CMD
ADD
ADD_WIDTH
ADD
DATA
1
BUSY
0
CMD_VLD
Bits
31:30
29:28
27:26
25
24
23:08
07:00
Name
Reserved
CMD
ADD_WIDTH
BUSY
CMD_VLD
ADD
DATA
Description
Reserved
Command
01 = Read
10 = Write
Address width
This field indicates the address width of the serial EEPROM,
and whether or not an EEPROM device is present.
00 = No EEPROM
01 = 9-bit address
10 = 16-bit address
Note: A blank EEPROM is indicated with 0b00. If this
occurs, these bits must be written with the appropriate
values before the EEPROM can be accessed.
This bit indicates the serial EEPROM is busy with
Read/Write operation.
Software must poll this bit before initiating a write/read to the
external EEPROM through a configuration write to the
“EEPROM Control Register”. For information on software
polling, see “System Diagram”.
This bit validates the command and side-band signals to the
serial EEPROM.
Address
This is the EEPROM address to be read from or written into.
DATA
This is the data to be written into the EEPROM.
Type
R
R/W
R/W
R
R/W
R/W
R/W
Reset value
0x0
0x0
Undefined
0x0
0x0
0x0000
0x00
PEB383 User Manual
July 25, 2011
Integrated Device Technology, Inc.
Confidential - NDA Required