ICS9LPRS365BGLF Datasheet, PDF (17/28 Pages) Integrated Device Technology – 64-pin CK505 w/Fully Integrated Voltage Regulator + Integrated Series Resistor

Integrated
Circuit
Systems, Inc.
ICS9LPRS365
Advance Information
Table 1: CPU Frequency Select Table
FSLC² FSLB¹ FSLA¹
B0b7 B0b6 B0b5
CPU
MHz
SRC
MHz
PCI REF USB
MHz MHz MHz
0
0
0
266.66
0
0
1
133.33
0
1
0
200.00
0
1
1
166.66 100.00 33.33 14.318 48.00
1
0
0
333.33
1
0
1
100.00
1
1
0
400.00
1
1
1
Reserved
1. FS_LA and FS_LB are low-threshold inputs.Please see V_{IL_FS} and V_{IH_FS} specifications in
the Input/Supply/Common Output Parameters Table for correct values.
Also refer to the Test Clarification Table.
2. FS_LC is a three-level input. Please see the V_{IL_FS} and V_{IH_FS}
specifications in the Input/Supply/Common Output Parameters Table for correct values.
DOT
MHz
96.00
Table 2: PLL3 Quick Configuration
B1b4 B1b3 B1b2
0
0
0
B1b1
0
Pin17 (TSSOP) Pin18 (TSSOP)
/ Pin24 (MLF) / Pin25 (MLF)
MHz
MHz
Spread
%
PLL 3 disabled
Comment
0
0
0
1
0
0
1
0
0
0
1
1
100.00
100.00
100.00
100.00
100.00
100.00
0.5% Down Spread
0.5% Down Spread
1% Down Spread
SRCCLK1 from SRC_MAIN
Only SRCCLK1 from PLL3
Only SRCCLK1 from PLL3
0
1
0
0
0
1
0
1
0
1
1
0
100.00
100.00
100.00
100.00
100.00
100.00
1.5% Down Spread
2% Down Spread
2.5% Down Spread
Only SRCCLK1 from PLL3
Only SRCCLK1 from PLL3
Only SRCCLK1 from PLL3
0
1
1
1
1
0
0
0
1
0
0
1
N/A
24.576
24.576
N/A
24.576
98.304
N/A
None
None
N/A
24.576Mhz on SE1 and SE2
24.576Mhz on SE1, 98.304Mhz on SE2
1
0
1
0
1
0
1
1
1
1
0
0
98.304
27.000
25.000
98.304
27.000
25.000
None
None
None
98.304Mhz on SE1 and SE2
27Mhz on SE1 and SE2
25Mhz on SE1 and SE2
1
1
0
1
N/A
N/A
N/A
N/A
1
1
1
0
N/A
N/A
N/A
N/A
1
1
1
1
N/A
N/A
N/A
N/A
1218—09/09/09
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