ICS9LPRS365BGLF Datasheet, PDF (11/28 Pages) Integrated Device Technology – 64-pin CK505 w/Fully Integrated Voltage Regulator + Integrated Series Resistor

Integrated
Circuit
Systems, Inc.
ICS9LPRS365
Advance Information
General Description
ICS9LPRS365 follows Intel CK505 Yellow Cover specification. This clock synthesizer provides a single chip solution for next
generation P4 Intel processors and Intel chipsets. ICS9LPRS365 is driven with a 14.318MHz crystal. It also provides a tight
ppm accuracy output for Serial ATA and PCI-Express support.
Block Diagram
X1
REF
X2 ^OSC
CPU
CPU PLL1 SRC
SS
SRC _MA IN
PLL3
SS
SRC
PCI33MHz
PCI33MHz
FSLA
CKPWRGD/PD#
PCI_STOP#
CPU_STOP#
CR#_(A:H)
27_Select
TME, ITP_EN
FSLC/TESTSEL
FSLB/TESTMODE
Control
Logic
Differential Output
SE Outputs
7
PLL2
Non-SS
27MHz_NonSS
SATA
DOT96MHz
48MHz
REF
CPU(1:0)
SRC8/CPU_ITP
SRC(11-9,4:3, 7:6)
PCIF5 (4:0)
SRC2/SATA
27MHz/SRC1/SE(2:1)
SRC0/DOT96
48MHz
Power Groups
Pin Number
VDD
GND
49
52
55
52
26, 36, 45
23, 29, 42
39
23, 29, 42
20
19
16
19
12
11
9
11
61
58
2
8
1218—09/09/09
Description
CPUCLK
Low power outputs
Master Clock, Analog
SRCCLK
Low power outputs
PLL 1
PLL3/SE
Low power outputs
PLL 3
DOT 96Mhz Low power outputs
USB 48
Xtal, REF
PCICLK
11