ICS1532 Datasheet, PDF (1/36 Pages) Integrated Device Technology – 110 MHZ TRIPLE 8-BIT ADC WITH CLOCK GENERATOR

ICS1532
110 MHZ TRIPLE 8-BIT ADC WITH CLOCK GENERATOR
General Description
The ICS1532 is a high-performance, cost-effective,
3-channel, 8-bit analog-to-digital converter with an
integrated line-locked clock generator. They are part
of a family of chips for high-resolution video
applications that use analog inputs, such as LCD
monitors, projectors, plasma displays, and HDTVs.
Using low-voltage CMOS mixed-signal technology,
they are an effective data-capture solution for VGA to
UXGA.
The ICS1532 chips offer analog-to-digital data
conversion and synchronized pixel-clock generation
up to 110 Mega samples per second, (MSPS) or 110
MHz. The Dynamic Phase Adjust (DPA) circuitry
allows end-user control over the pixel clock phase,
relative to the recovered sync signal and analog pixel
data. The ICS1532 provides two 24-bit pixels per
clock. An ADCSYNC output pin provides recovered
HSYNC in phase with the ADCRCLK output to be
used to synchronize horizontal timing.
A clamp signal can be generated internally or provided
through the CLAMP pin. An adjustable-gain video
amplifier fine tunes the analog signal. The PLL uses
an internal programmable feedback divider.
Two additional, independent programmable PLLs,
each with spread-spectrum functionality, can support
memory and panel clock requirements.
Block Diagram
Features
• Triple 8-bit analog-to-digital conversion
• 10 to 110 MHz operation
• Direct connection to analog input data
— Internal AC coupling capacitors
• Internal camp circuit and external clamp inputs
• Optional External Phase Detector Enable input
— COAST
• Uses 3.3 and 2.5 VDC
— 5 V tolerant digital inputs
• Integrated Amplifier with Adjustable Gain and Offset
• Dynamic Phase Adjust (DPA)
— Software adjustable analog sample point
• Low jitter
• Two additional PLLs
— Programmable spread spectrum
• Automatic Power-On Reset Detection
• Standard I²C 2-wire serial interface
— Two address sets available via external pin
• Lock detection in both hardware and software
• 144-pin low-profile quad flat pack (LQFP) package
Red
Clamp
Green
Clamp
Blue
COAST
Clamp
PLL
HSYNC
SDA
SCL
XTAL In
XTAL Out
Serial IF
XTAL Osc
POR
DPA
ADC
ADC
ADC
PLL Spread Spectrum
PLL Spread Spectrum
RA0-RA7
RB0-RB7
GA0-GA7
GB0-GB7
BA0-BA7
BB0-BB7
ADCRCLK
ADCSYNC
REF
MCLK
PCLK
MDS 1532 G
1
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Revision 060804