IC42S16102 Datasheet, PDF (73/78 Pages) Integrated Circuit Solution Inc – 512K x 16 Bit x 2 Banks (16-MBIT) SDRAM

IC42S16102
Read Cycle / Precharge Termination
T0
T1
T2
CLK
tCKS
CKE
tCS
CS
RAS
tCHI
tCK
tCL
tCKA
tCH
tCS
tCH
CAS
WE
A0-A9
A10
A11
tCS
tCH
tCS
tCH
tAS
tAH
ROW
tAS
tAH
ROW
tAS
tAH
BANK 0
DQM
T3
T4
T5
(1)
COLUMN m
NO PRE
BANK 0
tCS
tQMD
I/O
tRCD
tRAS
tRC
<ACT 0>
CAS latency = 3, burst length = 4
tCAC
<READ 0>
T6
T7
T8
T9
T10
BANK 0 OR 1
BANK 0
tCH
tAC
tLZ
tAC
tOH
DOUT m
tAC
tOH
DOUT m+1
tHZ
tOH
DOUT m+2
tRQL
tRP
<PRE 0>
T11 T12
ROW
ROW
BANK 1
BANK 0
tRCD
tRAS
tRP
<ACT>
Undefined
Don’t Care
Note 1: A8,A9 = Don't Care.
Integrated Circuit Solution Inc.
73
DR042-0A 01/18/2005