IC42S16102 Datasheet, PDF (43/78 Pages) Integrated Circuit Solution Inc – 512K x 16 Bit x 2 Banks (16-MBIT) SDRAM

IC42S16102
Read Cycle / Ping-Pong Operation (Bank Switching)
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9 T10
CLK
tCKS
CKE
tCS
CS
tCHI
tCK
tCL
tCKA
tCH
tCS
tCH
RAS
tCS
tCH
CAS
tCS
tCH
WE
A0-A9
A10
A11
tAS
tAH
ROW
tAS
tAH
ROW
tAS
tAH
BANK 0
(1)
COLUMN
AUTO PRE
NO PRE
BANK 0
ROW
ROW
BANK 1
(1)
COLUMN
AUTO PRE
NO PRE
BANK 1
BANK 0 OR 1
BANK 0
ROW
ROW
BANK 0
BANK 0 OR 1
BANK 1
DQM
I/O
tCS
tRRD
(BANK 0 TO 1)
tRCD
(BANK 0)
tRAS
(BANK 0)
tRC
(BANK 0)
tQMD
tLZ
tCAC
(BANK 1)
tAC
tAC
tOH
tOH
DOUT 0m
DOUT 0m+1
tHZ
tRCD
(BANK 1)
tCAC
(BANK 1)
tRAS
(BANK 1)
tRC
(BANK 1)
tCH
tAC
tAC
tOH
DOUT 1m
tLZ
tOH
DOUT 1m+1
tHZ
tRP
(BANK 0)
tRCD
(BANK 0)
tRAS
(BANK 0)
tRC
(BANK 0)
tRP
(BANK1)
<ACT 0>
<READ 0>
<READA 0>
<ACT1>
CAS latency = 2, burst length = 2
<READ 1>
<READA 1>
<PRE 0>
<ACT 0>
<PRE 1>
Undefined
Don’t Care
Note 1: A8,A9 = Don't Care.
Integrated Circuit Solution Inc.
43
DR042-0A 01/18/2005