IC42S16102 Datasheet, PDF (68/78 Pages) Integrated Circuit Solution Inc – 512K x 16 Bit x 2 Banks (16-MBIT) SDRAM

IC42S16102
Read Cycle / Page Mode; Data Masking
T0
T1
T2
T3
CLK
tCKS
CKE
tCS
CS
RAS
tCHI
tCK
tCL
tCKA
tCH
tCS
tCH
CAS
WE
A0-A9
tCS
tCH
tCS
tCH
tAS
tAH
ROW
tAS
tAH
A10
ROW
tAS
tAH
A11
BANK 1
BANK 0
DQM
I/O
tRCD
tRAS
tRC
<ACT>
CAS latency = 3, burst length = 2
T4
T5
T6
T7
T8
T9 T10
T11
T12
(1)
COLUMN m
NO PRE
BANK 1
BANK 0
tCS
tCAC
<READ>
(1)
COLUMN n
NO PRE
BANK 1
BANK 0
tQMD
(1)
COLUMN o
AUTO PRE
NO PRE
BANK 1
BANK 0
tCH
tQMD
BANK 0 AND 1
BANK 0 OR 1
BANK 1
BANK 0
tAC
tAC
tAC
tAC
tLZ
tOH
tOH
tOH
DOUT m
DOUT m+1
DOUT n
tCAC
tCAC
tAC
tOH
DOUT o
tOH
DOUT o+1
tHZ
tRQL
tRP
<READ>
<READ, MASK> <ENB>
<READA, MASK>
<PRE>
<PALL>
Undefined
Don’t Care
Note 1: A8,A9 = Don't Care.
68
Integrated Circuit Solution Inc.
DR042-0A 01/18/2005