IC42S16102 Datasheet, PDF (40/78 Pages) Integrated Circuit Solution Inc – 512K x 16 Bit x 2 Banks (16-MBIT) SDRAM

IC42S16102
Read Cycle
T0
T1
T2
T3
T4
CLK
tCKS
CKE
tCS
CS
RAS
tCHI
tCK
tCL
tCKA
tCH
tCS
tCH
CAS
WE
A0-A9
tCS
tCH
tCS
tCH
tAS
tAH
ROW
(1)
COLUMN m
A10
A11
DQM
tAS
tAH
ROW
tAS
tAH
BANK 1
BANK 0
NO PRE
BANK 1
BANK 0
tCS
tQMD
tAC
I/O
tLZ
tRCD
tCAC
tRAS
tRC
<ACT>
<READ>
CAS latency = 2, burst length = 4
T5
T6
T7
T8
T9 T10
BANK 0 AND 1
BANK 0 OR 1
BANK 1
tCH ^{BANK 0}
ROW
ROW
BANK 1
BANK 0
tAC
tOH
DOUT m
tAC
tOH
DOUT m+1
tAC
tOH
DOUT m+2
tRQL
tRP
<PRE>
<PALL>
tOH
DOUT m+3
tHZ
tRCD
tRAS
tRC
<ACT>
Undefined
Don’t Care
Note 1: A8,A9 = Don't Care.
40
Integrated Circuit Solution Inc.
DR042-0A 01/18/2005