IC42S16102 Datasheet, PDF (55/78 Pages) Integrated Circuit Solution Inc – 512K x 16 Bit x 2 Banks (16-MBIT) SDRAM

IC42S16102
Write Cycle / Precharge Termination
T0
T1
T2
T3
T4
T5
T6
T7
CLK
tCKS
CKE
tCS
CS
RAS
tCHI
tCK
tCL
tCKA
tCH
tCS
tCH
CAS
WE
A0-A9
tCS
tCH
tCS
tCH
tAS
tAH
ROW
(1)
COLUMN m
tAS
tAH
A10
ROW
tAS
tAH
NO PRE
BANK 0 OR 1
A11
BANK 0
BANK 0
BANK 0
tCS
tCH
tCS tCH
DQM
tDH
tDH
tDH
tDS
tDS
tDS
I/O
DIN 0m
DIN 0m+1
DIN 0m+2
tRCD
tRAS
tRC
<ACT 0>
<WRIT 0>
tRP
<PRE 0>
CAS latency = 2, burst length = 4
T8
T9
T10
ROW
ROW
BANK 1
BANK 0
tRCD
tRAS
tRC
<ACT >
(1)
COLUMN n
AUTO PRE
NO PRE
BANK 1
BANK 0
tCS
tDH
tDS
DIN 0n
<WRIT>
<WRITA>
Undefined
Don’t Care
Note 1: A8,A9 = Don't Care.
Integrated Circuit Solution Inc.
55
DR042-0A 01/18/2005