IC42S32400 Datasheet, PDF (59/62 Pages) Integrated Circuit Solution Inc – 1M x 32 Bit x 4 Banks (128-MBIT) SDRAM

IC42S32400
IC42S32400L
Figure 24.2.Precharge Termination of a Burst
(Burst Length=8 or Full Page,CAS#Latency=2)
T0 T 1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T 11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
t_CK2
CKE _High
CS#
RAS#
CAS#
WE#
BS0,1
A10
RAx
RAy
RAz
A0-A9
RAx
CAx
RAy
CAy
RAz
CAz
tWR _tRP
tRP
tRP
DQM
DQ
DAx0 DAx1 DAx2 DAx3
Ay0 Ay1 Ay2
Az0 Az1 Az2
Activate
Command
Bank A
Write
Command
Bank A
Precharge
Command
Bank A
Precharge Termination
of a Write Burst.
Write data is masked.
Activate
Command
Bank A
Read
Command
Bank A
Precharge
Command
Bank A
Activate
Command
Bank A
Read
Command
Bank A
Precharge
Command
Bank A
Precharge Termination
of a Read Burst.
Integrated Circuit Solution Inc.
59
DR038-0C 02/01/2005