IC42S32400 Datasheet, PDF (58/62 Pages) Integrated Circuit Solution Inc – 1M x 32 Bit x 4 Banks (128-MBIT) SDRAM

IC42S32400
IC42S32400L
Figure 23.Full Page Random Column Write (Burst Length=Full Page,CAS#Latency=2)
T0 T 1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T 11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
tCK2
CKE
CS#
RAS#
CAS#
WE#
BS0,1
A10
A0-A9
DQM
DQ
RAx
RBx
RAx
RBx CAx CBx CAy
CBy
CAz
RBw
CBz
RBw
t_WR
t _RP
t_RRD
t _RCD
DAx0 DBx0 DAy0 DAy1 DBy0 DBy1 DAz0 DAz1 DAz2 DBz0 DBz1 DBz2
Activate
Command
Bank A
Activate
Command
Bank B
Write
Command
Bank B
Write
Command
Bank A
Write
Command
Bank A
Write
Command
Bank B
Write
Command
Bank A
Write
Command
Bank B
Precharge
Command Bank B
(Precharge Temination)
Activate
Write Data
is masked
Command
Bank B
58
Integrated Circuit Solution Inc.
DR038-0C 02/01/2005