IC42S32400 Datasheet, PDF (38/62 Pages) Integrated Circuit Solution Inc – 1M x 32 Bit x 4 Banks (128-MBIT) SDRAM

IC42S32400
IC42S32400L
Figure 11.3.Random Row Read (Interleaving Banks)
(Burst Length=8,CAS#Latency=3)
T0 T 1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T 11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
tCK3
CKE ^High
CS#
RAS#
CAS#
WE#
BS0,1
A10
RBx
RAx
RBy
A0-A9
DQM
RBx
CBx
tRCD
tAC3
RAx
CAx
RBy
CBy
tRP
DQ ^Hi-Z
Activate
Command
Bank B
Read
Command
Bank B
Bx0 Bx1 Bx2 Bx3 Bx4 Bx5 Bx6 Bx7 Ax0 ^Ax1 Ax2 Ax3 Ax4 Ax5 Ax6 Ax7 ^By0
Activate
Command
Bank A
Read
Command
Bank A
Precharge
Command
Bank B
Activate
Command
Bank B
Read
Command
Bank B
Precharge
Command
Bank A
38
Integrated Circuit Solution Inc.
DR038-0C 02/01/2005