GMS81508A Datasheet, PDF (46/91 Pages) Hynix Semiconductor – USERS MANUAL

GMS81508/16
System Clock
Instruction
Fetch
Address Bus
Data Bus
Internal Read
Internal Write
pc
sp sp-1
sp-2
V.L V.H new pc
not Used PCH PCL PSW V.L ADL ADH Opcode
Interrupt Process Step
Interrupt Service Routine
V.L, V.H is Vector Address, ADL, ADH is start Address of Interrupt
Service Routine as Vector Contents
 Interrupt Process Step Timing
2.12.5. Software Interrupt
The interrupt is the lowest priority order software interrupt by BRK instruction. B-flag is set.
Interrupt vector of BRK instruction is shared with the vector of TCALL 0. Each processing step is
determined by B-Flag as a below.
BRK or TCALL0
B-Flag ?
0
1
BRK Interrupt Routine
TCALL 0 Routine
RETI
RET
 Execution of BRK/ TCALL0
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