GMS81508A Datasheet, PDF (28/91 Pages) Hynix Semiconductor – USERS MANUAL

GMS81508/16
2.6.1. Control of Timer
T0 ( T1 ) consists of 8-bit Binary Up-Counter. When the counting value of Timer0 , Timer1 and
Timer0-1(16bit) become equal to the contents of Timer Data Register(TDR0,TDR1,TDR0-1) value,
the counter is cleared to "00H" and restarts count-up operation. At this time, Interrupt request (IFT0
or IFT1) is generated.
TDR0 VALUE
MATCH
MATCH
MATCH
T0 VALUE
00_H
Clear
Clear
Clear
IFT0
Interrupt
Interrupt
Interrupt
Interval Period
Any of the PS2, PS4, PS6 or external clock can be selected as the clock source of T0 by
bit1(T0SLI) and bit0(T0SL0) of TM0. Any of the PS2, PS4, PS6 or overflow of T0 can be selected
as the clock source of T1 by bit5(T1SL1) and bit4(T1SL0) of TM0. When the overflow of T0 is
selected as input clock of T1, Timer0-1 operates as 16 -bit timer. In this case, Timer0-1 only is
controlled by T0ST,T0CN and the interrupt vector is Timer0 vector.
The operation of T0, T1 is controlled by bit3(T0ST), bit2(T0CN) and bit6(T1ST) of TM0. T0CN
controls count stop/start without clearing counter. T0ST and T1ST control count stop/start after
timer clear. In order to enable count-up of timer , T0CN, T0ST and T1ST should become “1”. In
order to start count-up after clearing of counter, T0ST or T1ST should be set to "1" after set to "0"
temporarily.
TDR0 VALUE
MATCH
MATCH
T0 VALUE
00_H
IFT0
T0ST
T0CN
COUNTER
Clear
Clear
Interrupt
Clear
Interrupt
“0” “1” Clear & Start
“0” “1” Start
Count
Stop
Count Stop
Count
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