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HY29LV320 Datasheet, PDF (32/44 Pages) Hynix Semiconductor – 32 Mbit (2M x 16) Low Voltage Flash Memory
HY29LV320
AC CHARACTERISTICS
Read Operations
Parameter
JEDEC Std
tAVAV
tRC
Description
Read Cycle Time 1
tAVQV
tACC Address to Output Delay
tELQV
tEHQZ
tGLQV
tGHQZ
tCE Chip Enable to Output Delay
tDF Chip Enable to Output High Z 1
tOE Output Enable to Output Delay
tDF Output Enable to Output High Z 1
tOEH
Output Enable
Hold Time 1
Read
Toggle and
Data# Polling
tAXQX
tOH
Output Hold Time from Addresses, CE#
or OE#, Whichever Occurs First 1
Notes:
1. Not 100% tested.
2. See Figure 15 and Table 15 for test conditions.
Test Setup
Speed Option
Unit
- 70 - 80 - 90 - 12
Min 70 80 90 120 ns
CE# = VIL
OE# = VIL
Max
70
80
OE# = VIL Max 70 80
Max 25 25
90 120 ns
90 120 ns
30 30 ns
CE# = VIL Max 30 30 35 50 ns
Max 25 30 30 30 ns
Min
0
ns
Min
10
ns
Min
0
ns
Addresses
CE#
tRC
Addresses Stable
tACC
OE#
WE#
Outputs
tOE
tOEH
tDF
tCE
tOH
Output Valid
RESET#
RY/BY#
0V
32
Figure 17. Read Operation Timings
r1.3/May 02