HY29LV320 Datasheet, PDF (1/44 Pages) Hynix Semiconductor – 32 Mbit (2M x 16) Low Voltage Flash Memory

HY29LV320
32 Mbit (2M x 16) Low Voltage Flash Memory
KEY FEATURES
n Single Power Supply Operation
– Read, program and erase operations from
2.7 to 3.6 volts
– Ideal for battery-powered applications
n High Performance
– 70, 80, 90 and 120 ns access time
versions for full voltage range operation
n Ultra-low Power Consumption (Typical/
Maximum Values)
– Automatic sleep/standby current: 0.5/5.0
µA
– Read current: 9/16 mA (@ 5 MHz)
– Program/erase current: 20/30 mA
n Top and Bottom Boot Block Versions
– Provide one 8 KW, two 4 KW, one 16 KW
and sixty-three 32 KW sectors
n Secured Sector
– An extra 128-word, factory-lockable
sector available for an Electronic Serial
Number and/or additional secured data
n Sector Protection
– Allows locking of a sector or sectors to
prevent program or erase operations
within that sector
– Temporary Sector Unprotect allows
changes in locked sectors
n Fast Program and Erase Times (typicals)
– Sector erase time: 0.5 sec per sector
– Chip erase time: 32 sec
– Word program time: 11 µs
– Accelerated program time per word: 7 µs
n Automatic Erase Algorithm Preprograms
and Erases Any Combination of Sectors
or the Entire Chip
n Automatic Program Algorithm Writes and
Verifies Data at Specified Addresses
n Compliant With Common Flash Memory
Interface (CFI) Specification
– Flash device parameters stored directly
on the device
– Allows software driver to identify and use a
variety of current and future Flash products
n Minimum 100,000 Write Cycles per Sector
n Compatible With JEDEC standards
– Pinout and software compatible with
single-power supply Flash devices
– Superior inadvertent write protection
n Data# Polling and Toggle Bits
– Provide software confirmation of
completion of program and erase
operations
n Ready/Busy (RY/BY#) Pin
– Provides hardware confirmation of
completion of program and erase
operations
n Write Protect Function (WP#/ACC pin)
− Allows hardware protection of the first or
last 32 KW of the array, regardless of sector
protect status
n Acceleration Function (WP#/ACC pin)
− Provides accelerated program times
n Erase Suspend/Erase Resume
– Suspends an erase operation to allow
reading data from, or programming data
to, a sector that is not being erased
– Erase Resume can then be invoked to
complete suspended erasure
n Hardware Reset Pin (RESET#) Resets the
Device to Reading Array Data
n Space Efficient Packaging
– 48-pin TSOP and 63-ball FBGA packages
LOGIC DIAGRAM
21
A[20:0]
CE#
OE#
WE#
RESET#
16
DQ[15:0]
WP#/ACC
RY/BY#
Revision 1.3, May 2002