GMS77C1001 Datasheet, PDF (27/44 Pages) Hynix Semiconductor – 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS77C1000/GMS77C1001
V_DD
Data Reg.
Data Bus
Data Bus
Direction Reg.
Data Bus
V_SS
Read
FIGURE 10-4 EQUIVALENT CIRCUIT FOR A SINGLE I/O PIN
Name Address Bit7 Bit6 Bit5 Bit4 Bit3
TRIS N/A
RA
05_H
RB
06_H
I/O control registers (TRISA, TRISB)
-
-
-
-
RA3
RB7 RB6 RB5 RB4 RB3
Bit2
RA2
RB2
Bit1
RA1
RB1
Bit0
RA0
RB0
Power-On
Reset
1111 1111
---- xxxx
xxxx xxxx
RESET and
WDT Reset
1111 1111
---- uuuu
uuuu uuuu
TABLE 10-1 SUMMARY OF PORT REGISTERS
Legend: Shaded boxes = unimplemented or unused, - = unimplemented, read as ‘0’, x = unknown, u = unchanged.
Otherwise, the previous state of that pin may be read into
the CPU rather than the new state.
When in doubt, it is better to separate these instructions
with a NOP or another instruction not accessing this I/O
port.
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Instruction
fetched
PC
output RB
PC+1
read RB port
PC+2
PC+3
no operation no operation
RB7:RB0
Port pin
written here
Port pin
read here
This example shows a write
to RB followed by a read
from RB.
FIGURE 10-5 SUCCESSIVE I/O OPERATION
24
July. 2001 Ver. 1.1