GMS77C1001 Datasheet, PDF (25/44 Pages) Hynix Semiconductor – 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS77C1000/GMS77C1001
Instruction Word
11
54
0
OPCODE
8
4
0
- --
FSR
Address : 04H
RESET Value: 1XXX_XXXX_B
Direct Addressing mode
0
Indirect Addressing mode
1
Data Memory Address
FIGURE 9-9 FSR REGISTER AND DIRECT/INDIRECT ADDRESSING MODE
9.3.7 OPTION Register
The OPTION register consists of 8-bit write-only register
and can not addressed. This register is able to control the
status of PFD, TMR0/WDT prescaler and TMR0.
To modify the OPTION register, the content of W register
are transferred to the OPTION register by executing the
OPTION instruction.
In reset state, the OPTION register is initialized with
“00111111_B” .
W
W
W
W
W
W
W
W
ADDRESS ; 03_H
RESET VALUE : 0011_1111
LOWOPT PFDEN T0CS T0SE PSA
PS2
PS1
PS0
W = Writable bit
bit7
6
5
4
3
2
1
bit0 _{-n = Value at POR reset}
LOWOPT: Power-fail detection level select bit.
1 = Lowered detection level (2.5V @ 5V)
0 = Normal detection level (3V @ 5V)
PFDEN:
Power-fail detection enable bit
1 = Enable power-fail detection
0 = Disable power-fail detection
T0CS:
Timer 0 clock source select bit
1 = Transition on EC0 pin
0 = Internal instruction cycle clock
T0SE:
Timer 0 source edge select bit
1 = Increment on high-to-low transition on
EC0
0 = Increment on low-to-high transition on
EC0
PS2-PS0: Prescaler rate select bits)
Bit Value
000
001
010
011
100
101
110
111
Timer 0 rate
1:2
1:4
1:8
1:16
1:32
1:64
1:128
1:256
WDT rate
1:2 (Typ. 28mS)
1:4 (Typ. 56mS)
1:8 (Typ. 112mS)
1:16 (Typ. 224mS)
1:32 (Typ. 448mS)
1:64 (Typ. 896mS)
1:128 (Typ. 1792mS)
1:256 (Typ. 3584mS)
PSA:
Prescaler assignment bit
1 = Prescaler assigned to the WDT
0 = Prescaler assigned to the Timer 0
FIGURE 9-10 OPTION REGISTER
22
July. 2001 Ver. 1.1