HYMP112F72CP8N3-C4 Datasheet, PDF (17/32 Pages) Hynix Semiconductor – 240pin Fully Buffered DDR2 SDRAM DIMMs

1240pin Fully Buffered DDR2 SDRAM DIMMs
Basic Functionality
1. Advanced Memory Buffer Overview
The Advanced Memory Buffer reference design complies with the JEDEC FB-DIMM Architecture and Proto-
col
Specification.
2. Advanced Memory Buffer Functionality
2.1 Advanced Memory Buffer
• Supports channel initialization procedures as defined in the initialization chapter of the FB-DIMM Archi-
tecture and Protocol Specification to align the clocks and the frame boundaries verify channel connec-
tivity and identify AMB DIMM position.
• Supports the forwarding of southbound and northbound frames, servicing requests directed to DIMM,
as defined in the protocol chapter, and merging the return data into the northbound frames.
• If the AMB resides on the last DIMM in the channel, the AMB initializes northbound frames.
• Detects errors on the channel and reports them to the host memory controller.
• Acts as DRAM memory buffer for all read, write and configuration accesses addressed to the DIMM.
• Provides a read buffer FIFO and a write buffer FIFO.
• Supports an SMBus protocol interface for access to the AMB configuration registers.
• Provides logic to support MEMBIST and IBIST Design for Test functions.
• Provides a register interface for the thermal sensor and status indicator.
• Functions as a repeater to extend the maximum length of FBD Links.
2.2 Transparent Mode for DRAM Test Support
In this mode, the Advanced Memory Buffer will provide lower speed tester access to DRAM pins through
the FB-DIMM I/O pins. This allows the tester to send and arbitrary test pattern to the DRAMs. Transparent
mode only supports a maximum DRAM frequency equivalent to DDR2 400.
Transparent mode functionality:
• Reconfigure FB-DIMM inputs from differential high speed link receivers to two single ended lower
speed receivers(~200 Mhz)
• These inputs directly control DDR2 Command/Address and input data that is replicated to all DRAMs
• Used low speed direct drive FB-DIMM outputs to bypass high speed Parallel/Serial circuitry and provide
test results back to tester
2.3 DDR2 SDRAM
• Supports DDR2 at speeds of 533,667 and 800 MT/s
• Supports 512Mb devices in x4 and x8 configurations
• 72 bit DDR2 SDRAM memory array
Rev 1.01 / Sep. 2008
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