HYMP112F72CP8N3-C4 Datasheet, PDF (16/32 Pages) Hynix Semiconductor – 240pin Fully Buffered DDR2 SDRAM DIMMs

1240pin Fully Buffered DDR2 SDRAM DIMMs
Advanced Memory Buffer(AMB) DRAM Interface Specifications
Please refer to the AMB Specification for all technical requirements
The following specifications for the AMB constitute the subset which is critical for proper operation of the
DDR2 SDRAM interface.
Note:
This list is not complete, more information will follow in later revisions of this specification.
Critical AMB Specifications
Symbol
tSU
tH
tDVBamb
tDVAamb
tCVBamb
tCVAamb
tDQSCKamb
C_IN
Parameter
DQ to DQS / DQS setup time (read)
DQ to DQS / DQS hold time (read)
AMB Data Valid Before DQS
AMB Data Valid After DQS
C/A/CNTL Valid Before Clock
C/A/CNTL Valid After Clock
DQS/DQS-to-CK/CK output skew
Input Capacitance(DQ/DQS/DQS)
Type
Input
Input
Output
Output
Output
Output
Output
VDDQ =1.8V +/-0.1V
Units Notes
Min.
Max
245
ps
1
245
ps
1
470
ps
1
470
1030
ps
1
ps
1
890
-240
ps
1
240
ps
1
2.0
2.5
pF 1
Note 1:
The timing numbers are for example only. Design should be based on the latest component specifications
Rev 1.01 / Sep. 2008
16