HDMP-1012 Datasheet, PDF (42/42 Pages) Agilent(Hewlett-Packard) – 4Low Cost Gigabit Rate Transmit/Receive Chip Set

LOOPEN = 0/1 selects either the
normal data or the loop channels
the I/O.
MDFSEL = 0/1 selects the Tx
single or double frame modes.
ECHKSEL = 0/1 selects either to
lock onto a frame-rate clock at
STRBIN or to use this clock as the
high speed clock and bypass the
PLL in the Tx. This input is used
mainly for testing, and should be
normally set low.
HCLKON = 0/1 turns on the high
speed serial clock outputs of the
Tx. This option was added to
conserve power.
EQEN = 0/1 disables or enables
the data equalizer in the Rx for
cable applications.
TCLKSEL = 0/1 selects the clock
source from either be derived
from the serial data stream or
from the TCLK inputs for the Rx.
This input is for testing only, and
should normally be set low.
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