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HD66724 Datasheet, PDF (62/117 Pages) Hitachi Semiconductor – (Graphics LCD Controller/Driver with Key Scan Function)
HD66724/HD66725
Key Scan Interrupt (Wake-Up Function)
If the interrupt enable bit (IRE) is set to 1, the HD66724/HD66725 send an interrupt signal to the MPU on
detecting that a key has been pressed in the key scan circuit by setting the IRQ* output pin to a low level.
An interrupt signal can be generated by pressing any key in a 32-key matrix. The interrupt level continues
to be output during the key scan cycle during which the key is being pressed.
Normal key scanning is performed and interrupts can occur in the HD66724/HD66725 sleep mode (SLP =
1). Accordingly, power consumption can be minimized in the sleep mode, by triggering the MPU to read
key states via the interrupt which is generated only when the HD66724/HD66725 detect a key input. For
details, refer to the Sleep Mode section.
On the other hand, normal key scanning and the internal operating clock stop in the standby mode (STB =
1). During this period, the KST0 output is kept low, so the HD66724/HD66725 can always monitor eight
key inputs (KIN0-KIN7) connected to KST0 when RS = GND. Therefore, if any of the eight keys is
pressed, an interrupt occurs. When RS = Vcc, all outputs KST0 to KST3 are kept low, so the
HD66724/HD66725 can always monitor 32 key inputs. If any of 32 keys is pressed, an interrupt occurs.
Accordingly, power consumption can further be minimized in the standby mode, where the whole system is
inactive, by triggering the MPU via the interrupt which is generated only when the HD66724/HD66725
detect a key input from the above keys. For details, refer to the Standby Mode section.
The IRQ* output pin is pulled up to the VCC with an internal MOS resistor of approximately 50 kΩ.
Additional external resistors may be required to obtain stronger pull-ups. Interrupts may occur if noise
occurs in KIN0-KIN7 input during key scanning. Interrupts must be inhibited if not needed by setting the
interrupt enable bit (IRE) to 0.
VCC
HD66724
HD66725
IRQ*
MPU
IRQ*
Interrupt generated
Figure 30 Interrupt Generation
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