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HD66724 Datasheet, PDF (104/117 Pages) Hitachi Semiconductor – (Graphics LCD Controller/Driver with Key Scan Function)
HD66724/HD66725
80-System Bus Interface Timing Characteristics
(Vcc = 1.8 to 2.7 V)
Item
Symbol Min Typ Max
Bus cycle time
Write tCYCW 800
—
—
Read tCYCR 1200 —
—
Write low-level pulse width
PWLW 150
—
—
Read low-level pulse width
PWLR 450
—
—
Write high-level pulse width
PWHW 300
—
—
Read high-level pulse width
PWHR 450
—
—
Write/Read rise/fall time
tWRr , WRf
—
— 25
Setup time (RS to CS*, WR*, RD*)
t AS
60 — —
Address hold time
t AH
20 — —
Write data set-up time
t DSW
60
—
—
Write data hold time
tH
20 — —
Read data delay time
t DDR
—
— 400
Read data hold time
t DHR
5
——
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Test Condition
Figure 66
Figure 66
Figure 66
Figure 66
Figure 66
Figure 66
Figure 66
Figure 66
Figure 66
Figure 66
Figure 66
Figure 66
Figure 66
(Vcc = 2.7 to 5.5 V)
Item
Symbol Min
Bus cycle time
Write tCYCW 500
Read tCYCR
700
Write low-level pulse width
PWLW
80
Read low-level pulse width
PWLR 300
Write high-level pulse width
PWHW 250
Read high-level pulse width
PWHR 300
Write/Read rise/fall time
tWRr, WRf
—
Setup time (RS to CS*, WR*, RD*)
t AS
60
Address hold time
t AH
20
Write data set-up time
t DSW
60
Write data hold time
tH
20
Read data delay time
t DDR
—
Read data hold time
t DHR
5
Typ Max
——
——
——
——
——
——
— 25
——
——
——
——
— 250
——
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Test Condition
Figure 66
Figure 66
Figure 66
Figure 66
Figure 66
Figure 66
Figure 66
Figure 66
Figure 66
Figure 66
Figure 66
Figure 66
Figure 66
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