HD66724 Datasheet, PDF (57/117 Pages) Hitachi Semiconductor – (Graphics LCD Controller/Driver with Key Scan Function)

HD66724/HD66725
Serial Data Transfer
Setting the IM1 and IM2 pins (interface mode pins) to the GND level allows standard clock-synchronized
serial data transfer, using the chip select line (CS*), serial data line (SDA), and serial transfer clock line
(SCL). For a serial interface, the IM0/ID pin function uses an ID pin.
The HD66724/HD66725 initiate serial data transfer by transferring the start byte at the falling edge of CS*
input. They end serial data transfer at the rising edge of CS* input.
The HD66724/HD66725 are selected when the 6-bit chip address in the start byte transferred from the
transmitting device matches the 6-bit device identification code assigned to the HD66724/HD66725. The
HD66724/HD66725, when selected, receive the subsequent data string. The least significant bit of the
identification code can be determined by the ID pin. The five upper bits must be 01110. Two different chip
addresses must be assigned to a single HD66724/HD66725 because the seventh bit of the start byte is used
as a register select bit (RS): that is, when RS = 0, an instruction can be issued or key scan data can be read,
and when RS = 1, the data can be written to or read from RAM. Read or write is selected according to the
eighth bit of the start byte (R/W bit) as shown in table 33.
After receiving the start byte, the HD66724/HD66725 receive or transmit the subsequent data byte-by-byte.
The data is transferred with the MSB first. To transfer the data consecutively, note that only the display-
clear instruction requires a longer execution time than the others (table 32).
Two bytes of the RAM read data after the start byte are invalid. The HD66724/HD66725 start to read the
correct RAM data from the third byte. Write a dummy instruction ("00H") before reading the key scan data.
Table 33 Start Byte Format
Transfer Bit
S
1
2
3
4
5
6
7
8
Start byte format
Transfer start Device ID code
RS R/W
0
1
1
1
0
ID
Note: ID bit is selected by the IM0/ID pin.
Table 34 RS and R/W Bit Function of Clock-Synchronized Serial Interface Data
RS R/W Function
0
0
Writes instruction
0
1
Reads key scan data
1
0
Writes RAM data
1
1
Reads RAM data
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