HD66724 Datasheet, PDF (55/117 Pages) Hitachi Semiconductor – (Graphics LCD Controller/Driver with Key Scan Function)

HD66724/HD66725
Reset Function
The HD66724/HD66725 are internally initialized by RESET input. During initialization, the system
executes a clear display instruction after reset is canceled. The system executes the other instructions
during the reset period. Because the busy flag (BF) indicates a busy state (BF = 1) during the reset period
and execution of the clear display instruction following reset cancellation, no instruction or RAM data
access from the MPU is accepted. Here, reset input must be held back for at least 1 ms, and an issuing
instruction must wait for 1,000 clock cycles after reset is canceled because the display clearing continues
after reset cancellation.
Instruction Set Initialization:
1. Clear display executed (Writes 20H to DDRAM)
2. Return home executed (Sets the address counter (AC) to 00H to select DDRAM)
3. Start oscillator executed
4. Driver output control (SGS = 0, CMS = 0)
5. Power control (AMP = 0: LCD power off, SLP = 0: Sleep mode off, STB = 0: Standby mode off)
6. Single boost (BT1/0 = 00), 1/6.5 bias drive (BS2/1/0 = 000), Weak contrast (CT4-0 = 00000)
7. Entry mode set (ROM = 0: CGROM bank 0, I/D = 1: Increment by 1, GR = 0: Character display mode)
8. Cursor display off (B/W = 0, C = 0, B = 0)
9. Display on/off control (D = 0: Display off, CEN = 0: Normal position, LC = 0: Line-cursor off)
10. Display control (NL2/1/0 = 100: 1/34 duty ratio)
11. Double-height display off (DL3/2/1 = 000)
l2. Vertical scroll control (SN2/1/0 = 000: First line displayed at the top, SL2/1/0: First raster-row
displayed at the top of the first line)
13. Horizontal scroll off (SEE = 0, SE2/1 = 00, SE4/3 = 00, SQ2/1/0 = 000)
14. Key scan control (IRE = 0: Key scan interrupt (IRQ) generation disabled, KF1/0 = 00: Key scan set to
32 cycles)
15. Port control (PT2/1/0 = 000: PORT2/1/0 output = GND level)
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